IIR4TYPES Project Status | |||
Project File: | Iir4Types.ise | Current State: | Programming File Generated |
Module Name: | Iir4Types |
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No Errors |
Target Device: | xc3s250e-5vq100 |
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28 Warnings |
Product Version: | ISE 9.1i |
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? 8 17 13:29:16 2007 |
IIR4TYPES Partition Summary | |||
No partition information was found. |
Device Utilization Summary | ||||
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Flip Flops | 1,125 | 4,896 | 22% | |
Number of 4 input LUTs | 1,500 | 4,896 | 30% | |
Logic Distribution | ||||
Number of occupied Slices | 1,155 | 2,448 | 47% | |
Number of Slices containing only related logic | 1,155 | 1,155 | 100% | |
Number of Slices containing unrelated logic | 0 | 1,155 | 0% | |
Total Number of 4 input LUTs | 1,768 | 4,896 | 36% | |
Number used as logic | 1,500 | |||
Number used as a route-thru | 268 | |||
Number of bonded IOBs | 41 | 66 | 62% | |
IOB Flip Flops | 8 | |||
Number of GCLKs | 1 | 24 | 4% | |
Number of MULT18X18SIOs | 12 | 12 | 100% | |
Total equivalent gate count for design | 22,087 | |||
Additional JTAG gate count for IOBs | 1,968 |
Performance Summary | |||
Final Timing Score: | 0 | Pinout Data: | Pinout Report |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report |
Timing Constraints: | All Constraints Met |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | Current | ? 8 17 13:26:22 2007 | 0 | 28 Warnings | 63 Infos |
Translation Report | Current | ? 8 17 13:26:36 2007 | 0 | 0 | 0 |
Map Report | Current | ? 8 17 13:26:56 2007 | 0 | 0 | 3 Infos |
Place and Route Report | Current | ? 8 17 13:28:37 2007 | 0 | 0 | 0 |
Static Timing Report | Current | ? 8 17 13:28:53 2007 | 0 | 0 | 2 Infos |
Bitgen Report | Current | ? 8 17 13:29:15 2007 | 0 | 0 | 0 |